PhD Student
Georgia Institute of Technology
School of ECE
Atlanta, Georgia
amoschos@gatech.edu

News

Nov 2025: I am officially a PhD Candidate!🎉
Aug 2025: Happy to have contributed to CIMTech's compute-in-memory tape-out from the role of EDA advisor. Check them out!
Aug 2025: Our first tape-out for SiliconJackets is real! The chip features our in-house RISC-V ISA core and was realized through Cadence’s SKY130 MPW program.
May 2025: Our SiliconJackets submission for the IEEE SSCS Code-a-Chip Challenge won the travel grant for the VLSI'25 Symposium!
Jan. 2025: I have joined Georgia Tech's Silicon Jackets as a Lead of the Physical Design team!


I am Nassos, an ECE PhD Candidate at the COEUS Center at the Georgia Institute of Technology. I am advised by Dr. Angelos Keromytis. My research interests lie at the intersection of IC design and hardware security, focusing on hardware trojan attacks on modern microarchitectures and their implications for global chip supply-chain security. Other topics of interest include computer architecture and side-channel analysis. I am always looking for collaborations in the above areas, so feel free to drop me an e-mail if interested.

Select publications

Towards Practical Fabrication Stage Attacks Using Interrupt-Resilient Hardware Trojans
Athanasios Moschos, Fabian Monrose, Angelos D. Keromytis
IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2024
 [GitHub]